FPGA pitfalls
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Any signals entering the device must pass through an IBUF symbol,and any leaving the device must pass through an OBUF so that the compiler knows to route the signal to a pin.It is a good idea to name the wire between the buffer and the corresponding IPAD or OPAD so that it appears in pin listings with a sensible name rather than a computer assigned name.
When starting your FPGA either using the software supplied or if you need to write your own loader for the micro in your target system be aware that although you may have set the i/o pads to become active N clock cycles after the end of configuration you will infact need N+1 clock pulses for this to happen.Look carefully at the timing diagram in the 4000 series FPGA datasheet to see why.
©2000 SPROW [Created 17-Dec-2000] | home
